Stereo correspondence is a popular algorithm for the extraction of depth information from a pair of rectified 2D images. Hence,\r\nit has been used in many computer vision applications that require knowledge about depth. However, stereo correspondence is a\r\ncomputationally intensive algorithm and requires high-end hardware resources in order to achieve real-time processing speed in\r\nembedded computer vision systems. This paper presents an overview of the use of edge information as a means to accelerate\r\nhardware implementations of stereo correspondence algorithms. The presented approach restricts the stereo correspondence\r\nalgorithm only to the edges of the input images rather than to all image points, thus resulting in a considerable reduction of\r\nthe search space. The paper highlights the benefits of the edge-directed approach by applying it to two stereo correspondence\r\nalgorithms: an SAD-based fixed-support algorithm and a more complex adaptive support weight algorithm. Furthermore, we\r\npresent design considerations about the implementation of these algorithms on reconfigurable hardware and also discuss issues\r\nrelated to the memory structures needed, the amount of parallelism that can be exploited, the organization of the processing\r\nblocks, and so forth. The two architectures (fixed-support based versus adaptive-support weight based) are compared in terms of\r\nprocessing speed, disparity map accuracy, and hardware overheads, when both are implemented on a Virtex-5 FPGA platform.
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